1. Field of the Invention
This invention relates to semiconductor integrated circuits and more particularly to high density read only memory devices and methods of operation of a high density ROM.
2. Description of Related Art
Okada et al "16Mb ROM Design Using Bank Select Architecture", 1988 Symposium on VLSI Circuits, pages 85-86 describes a 16Mb ROM, with diffusion bit lines. In order to reduce the series bit line resistance, the ROM is divided into 256 banks, each of which has 16 word lines. The diffusion bit lines in each bank are connected to metallic (aluminum) lines via the bank select transistors. The aluminum lines are the main bit lines and the virtual ground lines which are used in pairs for reading out the ROM cell array data. Two diffusion bit lines are provided for each metallic bit line as a layout ground rule with odd and even bank select transistors connected alternatively. The disadvantage of the design is leakage causing problems (during reading or during standby as well) possibly leading to false "on" readings when the circuit was "off". There is a reduced margin with sense amplifiers. In addition, it is required that the overlap of each polysilicon word line in the select area over the buried N+ line, taking up needed space. Particularly with smaller feature sizes .ltoreq.0.8 .mu.m produces rounding of the end of the buried N+ bit lines due to lithography limitations, so overlap is required on the bit line side. The misalignment of the polysilicon word lines to the buried N+ bit lines is the principal disadvantage of Okada et al.
U.S. Pat. No. 5,151,375 of Kazerounian et al for "EPROM Virtual Ground Array" describes an EPROM with floating gate transistors and select transistors in an array. Select transistors are duplicated to reduce line resistance. The select transistors are aligned in the same direction as the cell transistors. Therefore, there is not the overlap bit line problem found in the Okada et al. However, sensing cannot share two word lines with one decoder line, because otherwise a false reading is possible. The main disadvantage of the cell of of Kazerounian et al is that the row decoder scheme in combination with each ROM bank is complex.
An object of this invention is to provide sensing sharing two word lines with one decoder line.
Another object of this invention is to avoid leakage causing problems (during reading or during standby as well) possibly leading to false "on" readings when the circuit was "off".
Another object of this invention is to improve the margin with sense amplifiers.
A further object is to avoid overlap of each polysilicon word line in the select area over the buried N+ line which takes up space.
Still another object of this invention is to avoid misalignment of the polysilicon word lines to the buried N+ bit lines.